Teaching Faculties

Vijay, A., Duari, C., Sharma, M. K., Garg, L., & Singh, A. K. (2023). CMOS Analog Multipliers: Low Power Design Strategies and the Impact of Threshold Voltage Variations. Journal of Mines, Metals & Fuels, 71(4).
Vijay, A., Duari, C., Garg, L., & Singh, A. K. (2023, February). CMOS Schmitt Trigger Circuit and Oscillator Design: The Impact of NBTI Degradation. In 2023 7th International Conference on Computing Methodologies and Communication (ICCMC) (pp. 7-10). IEEE.
Vijay, A., Duari, C., Garg, L., & Singh, A. K. (2023, January). Nanoscale CMOS Biasing Circuit for Analog Applications: The Impact of NBTI Degradation. In 2023 International Conference for Advancement in Technology (ICONAT) (pp. 1-3). IEEE.
Vijay, A., & Sharma, M. K. (2022). Modeling of Drain Current for Degradation in Threshold Voltage and Mobility Due to Aging in a-Si: H TFTs. In Flexible Electronics for Electric Vehicles: Select Proceedings of FlexEV-2021 (pp. 201-206). Singapore: Springer Nature Singapore.

Be READY FOR the great future